The present invention generally relates to the testing of semiconductor integrated circuit (IC) devices. More particularly the present invention relates to a test board provided with a capacitor charging circuit for reducing the test time of the IC devices and a related test method.
In general, IC devices are manufactured through circuit design, wafer fabrication, and assembly processes. All of the devices produced through these manufacturing techniques must be tested before shipment to verify that the devices exhibit the intended normal functions specified during the initial circuit design step and to ensure that they have acceptable reliability and quality demanded by specific customers. Therefore, to manufactures who are producing IC devices in commercial quantity, the time required to test IC devices is an important factor in improving the productivity of such IC devices.
However, unlike digital IC devices, liner IC devices are tested in a condition where passive elements such as resistors and capacitors are connected to device pins and bias voltages supplied to the devices are stabilized. Unfortunately, some linear devices such as high power amplifiers and equalizer amplifiers require several milliseconds to stabilize the bias voltages, which results in an increase of overall test time.
FIG. 1 shows a circuit for a conventional test process for linear IC devices. In this conventional test process, a linear device 10 employs operational amplifiers as its main components. The linear device 10 has a positive power terminal 1, a positive input terminal 2, a negative input terminal 3, a negative power terminal 4, and an output terminal 5.
A positive supply voltage V.sub.cc (5V, for example) is supplied to the positive power terminal 1. A negative supply voltage (ground voltage, for example) is supplied to the negative power terminal 4. Input signals V.sub.i are supplied to the positive input terminal 2 as test signals by a tester (not shown). These input signals V.sub.i are supplied to the positive input terminal 2 through conductive pattern wirings formed on a test board (not shown). The negative input terminal 3 is connected to the ground terminal through a capacitor C.sub.i. Output signals V.sub.o coming out through the output terminal 5 are delivered to the tester through the conductive pattern wires and are measured by the tester. The tester analyzes the output signals, and from this analysis determines the electrical characteristics of the device.
When measuring currents of the device 10, the capacitor C.sub.i must be charged. The charged voltage of the capacitor C.sub.i is then applied to the negative input terminal 3, and the current is measured by supplying the input signals V.sub.i to the device 10. The time required to charge the capacitor C.sub.i is determined by the equations: EQU Q=CV (1) EQU Q=IT (2) EQU T=CV/I (3)
where Q is the electrical charge stored in the capacitor C.sub.i, C is the dielectric constant of the capacitor C.sub.i, V is the voltage applied across the capacitor C.sub.i, I is the current flowing through the capacitor C.sub.i, and T is the charging time of the capacitor C.sub.i.
If the linear devices to be tested are high power devices such as power amplifiers and equalizer amplifiers, the current to be measured is often as great as 0.5 A or 1 A, and so the dielectric constant C of the capacitor C.sub.i is also great. As seen from the equation (3), the charging time T is proportional to the dielectric constant C, so as the dielectric constant increases, so to does the capacitor's charging time, which leads to an increase in the test time of each device.